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Keysight/N4903B N4903B Serial BERT 12.5Gb/s

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Keysight offers a wide range of serial bit error ratio test (BERT) solutions for R&D and manufacturing. The J-BERT N4903B highperformance serial BERT is the flagship of Keysight’s N4900 serial BERT series. It addresses the needs of R&D and validation teams who characterize serial I/O ports or ASICs up to 14.2 Gb/s. Integrated and calibrated jitter sources for jitter tolerance measurements also allow designers to characterize and prove compliance of their receiver’s jitter tolerance.

The B version of the J-BERT has been improved to address the test needs during characterization and compliance test of emerging forwarded clock and embedded clock devices in the most complete and integrated way.

  • Supports testing of forwarded clock devices: halfrate clock with variable duty cycle, jitter on clock and data, delay of jitter between clock and data
  • PCIe 2.0 compliant jitter injection: LF-RJ and HF-RJ, dual-tone PJ, residual SSC, electrical idle
  • Variable output levels on trigger and aux data outputs
  • 16x FC testing with extended data rate for the pattern generator up to 14.2 Gb/s
  • Arbitrary SSC profile and extended SSC range to characterize SATA/SAS and USB3 receivers under real-world condition
  • Improved output signal performance
  • Wider PJ range up to 300 MHz
  • Built-in tunable CDR always included
  • Pattern sequencer with up to 60 blocks
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